1. Field of the Invention
The present invention relates to a Field-Effect Transistor (FET) sensor using semiconductor technology, and more particularly, to a semiconductor FET sensor employing a fin-shaped structure to improve sensitivity and a method of fabricating the FET sensor.
The present invention is derived from the work supported by the IT R&D program of the Ministry of Information and Communication and the Institute for Information Technology Advancement (South Korea) [Project Management Number: 2006-S-007-02. Project Title: Ubiquitous Health Monitoring Module and System Development].
2. Discussion of Related Art
A semiconductor FET sensor has a very small wire or thin film-type semiconductor structure to which a sensing material to be combined with a detection-target material is attached, and senses a change in electrical conductivity of the semiconductor structure when the target material is combined with the sensing material. The field effect is caused by an electrochemical reaction occurring when the target material is combined with the sensing material, or caused when an electrically charged target material is combined with the sensing material. In either case, electrons or holes of the semiconductor structure are accumulated or depleted due to the field effect, which may be measured by a change in conductivity. The above-mentioned FET sensor technology facilitates high-sensitivity detection and quantification of a target material in comparison with a conventional label-free sensor using color, fluorescence, etc.
FIGS. 1A and 1B schematically show structures of typical FET sensors according to conventional art.
FIG. 1A shows an FET sensor having a gate region between a source and a drain to which a sensing material is attached. In the FET sensor having such a planar structure, the sensing material to be combined with a target material is disposed only in an upper part of the semiconductor structure. Thus, when a charged target material is combined with the sensing material, electrons or holes are accumulated or depleted in only one surface of the upper part.
FIG. 1B shows an FET sensor having a semiconductor structure in which a carbon nanotube or silicon nanowire is formed between a source and a drain. The FET sensor detects a target material using a change in conductivity of the carbon nanotube or silicon nanowire caused when a sensing material attached to the carbon nanotube or silicon nanowire is combined with the target material. Since a structure can be fabricated to have a size of 20 nm or less using a carbon nanotube or silicon nanowire, even a small amount of target material can cause enough depletion to enable high-sensitivity detection. However, such a carbon nanotube or silicon nanowire is made through chemical synthesis and thus is difficult to fix at a desired position on a sensor chip.
For the purpose of high-sensitivity detection of a target material, semiconductor structures of FET sensors on which a sensing material is combined with a target material need to be miniaturized. In a minute structure, a greater field effect is caused by a target material, and the level of a signal can increase. A semiconductor structure can be miniaturized by reducing a dimension such as a thickness of a thin film or a line width, and reducing the concentration of dopant in a substrate to reduce an interval between electrical depletions of a semiconductor structure. In reducing a dimension such as a thin-film thickness or line width of a semiconductor structure, the size of a semiconductor structure can only be reduced as far as current semiconductor process technology permits. A carbon nanotube or silicon nanowire synthesized by a Chemical Vapor Deposition (CVD) method can be miniaturized but is difficult to mass-produce. Use of a Silicon-on-Insulator (SOI) substrate enables mass-production, but limits miniaturization. For example, in SOI wafers currently used in mass-production lines, the uppermost silicon thin film is produced to a reduced thickness of 50 nm. An additional semiconductor process enables the thickness to be reduced to 20 nm but reduces process flexibility, thereby reducing production yield and increasing unit cost. In addition, the thinner an upper silicon layer of an SOI substrate, the larger an interface effect between the upper silicon layer and a Buried Oxide (BOX) layer. This affects the conductivity of the semiconductor structure, and reduces a Signal-to-Noise Ratio (SNR), thus deteriorating signal reproducibility. In addition, even when a target material is not combined with a sensing material, the semiconductor structure may already have been depleted by the interface effect, and current may not flow. Consequently, a signal may not be detected.